毕业设计摘要翻译(汉译英),谢绝用机器翻译,谢谢!

发布网友发布时间：2022-05-17 03:37

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热心网友时间：2023-09-29 02:02

This article elaborated the UART asynchronous serial communicationprinciple, the FPGA basic structure and the development flow as wellas the development direction, introced FPGA development softwareQuartusII and simulation software Modelsim. Completes UART controllerVerilog the HDL procere, obtains the correct simulation profilethrough Modelsim simulation software. FPGA is English FieldProgrammable Gate Array abbreviation, namely the scene programmablegate array, it is the proct which in PAL, GAL, EPLD and so on in theprogrammable component foundation further develops. It is took thespecial-purpose integrated circuit (ASIC) in the domain one kindpartly has custom-made, both solves has had custom-made the electriccircuit which the electric circuit appears the insufficiency, and hasovercome the original programmable component gate number limitedshortcoming. UART is Universal Asynchronous Receiver the Transmittergeneral asynchronous transceiver, is the widespread use serial datatransmission sdt agreement. Asynchronous serial communication requesttransmission line few, reliability high, the transmitting range isfar, is widely applied the data exchange which and outside supposes tothe microcomputer. In the computer, UART is connected to proces thecompatible RS232 standard signal electric circuit. The RS232 standarddefinition logic "1" the signal is opposite to the place is 3 to 25volts, but the logic "0" is opposite to the place is -3 to -25 volt.Therefore, when in micro controller UART is connected to PC, it needsa RS232 driver to transform the level. Realizes the UART function withFPGA, may rece the system the area, reces the system the powerloss, enhances the design the stability, also fully has used the FPGAsurplus resources.

热心网友时间：2023-09-29 02:02

尊重下自己的劳动吧！
也不要低估别人的知识产权！